1. Field of the Invention
The present invention relates to a semiconductor chip testing method and a semiconductor chip testing device required to provide high reliability.
2. Description of the Background Art
A conventional semiconductor chip testing device used to test a plurality of semiconductor chips on a semiconductor wafer determines if various electrical characteristics of the semiconductor chips are non-defective or defective according to a range of specifications required in terms of application (see Japanese Patent Application Laid-Open No. 8-86833 (1996), for example).
If there is a crystal defect in a semiconductor wafer (hereinafter also called a wafer) or if there is an abnormality in a processing device for manufacturing semiconductor, electrical characteristics are easily determined to be defective in a particular position on the wafer. If a defect generated in such a particular position is a tiny defect and cannot be detected in terms of electrical characteristics of a semiconductor chip, the conventional semiconductor chip testing device determines that this semiconductor chip is non-defective. This results in a problem in that the conventional semiconductor chip testing device in fact has allowed shipment of a semiconductor chip (hereinafter also called a chip) with a defect.